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Plasticine: A Reconfigurable Dataflow Architecture for Software 2.0

The use of machine learning to generate models from data is replacing traditional software development for many applications. This fundamental shift in how we develop software, known as Software 2.0, has provided dramatic improvements in the quality and ease of deployment for these applications. The continued success and expansion of the Software 2.0 approach must be powered by the availability of powerful, efficient and flexible chips that are tailored for machine learning applications. This talk will describe a design approach that optimizes computer systems to match the requirements of machine learning applications. The full-stack design approach integrates machine learning algorithms that are optimized for the characteristics of applications and the strengths of modern hardware, domain-specific languages and advanced compilation technology designed for programmability and performance, and a reconfigurable dataflow architecture called Plasticine that achieve both high flexibility and high energy efficiency.

Plasticine is a new spatially reconfigurable architecture designed to efficiently execute applications composed of parallel patterns. I will describe the Plasticine architecture: the compute pipeline that exploits nested parallelism, the configurable memory system that captures data locality and sustains compute throughput with multiple banking modes, and the on-chip interconnect that supports communication at multiple levels of granularity.

Speaker: Prof. Kunle Olukotun, Stanford University/SambaNova Systems

Thursday, 04/18/19


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Texas Instruments Silicon Valley Auditorium

2900 Semiconductor Dr
Santa Clara, CA 95051
United States