Creating System-On-Chips: Mixing HW & SW Successfully
The scale and complexity of chip design has exploded in the last twenty years.
Starting with a brief review of the hardware design and verification techniques used over the last two decades, this presentation will explore how chips have evolved into System on Chips (SoCs), and will explore the emergence of new design and verification techniques to tackle the complexity of today's SoCs, which frequently include multiple processors, embedded software, and complex communication protocols. We will then explore some new design and verification techniques for SoCs that are likely to become prevalent in the near future.
Speaker: Stuart Swan, Cadence
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Tuesday, 03/13/12
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Santa Clara Valley IEEE Computer Society
Cadence, Bldg 10
2655 Seely Ave
San Jose, CA 95134
2655 Seely Ave
San Jose, CA 95134
Website: Click to Visit
